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CPU Performance Architect

Theery

This is a Full-time position in san jose, CA posted January 3, 2023.



Requirements:

· Deep knowledge and extensive experience in CPU architecture and microarchitecture as it relates to application and benchmark performance

· Familiarity with branch prediction algorithms, prefetch algorithms, fusion/fission, issue queue organization, load/store pipelines and value prediction

· Familiarity with techniques to increase IPC of out of order CPUs

· Familiarity with code sequences in widely used benchmarks and applications such as SPECInt, SPECFp, TPC-C, Web applications, networking applications and knowledge of microarchitectural techniques to accelerate such sequences

· Experience developing and enhancing performance models

· Ability to locate and debug discrepancies between a performance model and observed performance on RTL simulations

· At least a passing familiarity with code generation by compilers and an ability to identify code generation changes to improve CPU pipeline performance

· Broad familiarity with published information on CPU microarchitectures from Intel, AMD, Apple, ARM

· Familiarity with literature on CPU architecture and performance optimization ideas

· Demonstrated track record of taking a performance feature from conception to implementation

· Proficiency in C++

· Experience reading and understanding Verilog code